Optimize swizzle_dyn on ssse3#543
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programmerjake merged 1 commit intoJul 26, 2026
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…e correctness for mask values 128-255. Changes the control sequence from vpcmpgtb + vpblendvb to vpaddb + vpor. 15% throughput improvement on Haswell, 20% improvement on skylake, zen1, zen3. For the 256-bit case, 38% improvement on haswell, 12% on skylake, zen1 and zen3 unchanged. Expand test coverage to cover byte values 128-255 which would misbehave without the OR.
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The idea was suggested by @axnsan12.
Changes the control sequence from vpcmpgtb + vpblendvb to vpaddb + vpor. 15% throughput improvement on Haswell, 20% improvement on skylake, zen1, zen3. For the 256-bit case, 38% improvement on haswell, 12% on skylake, zen1 and zen3 unchanged. Disassembly measured on fealrless_simd similarly to #542.
Expands test coverage to cover byte values 128-255 which would misbehave without
idxs | zeroing_bits.