Skip to content

gemm: check tile sizes against the kernel's divisibility rule, not a bound - #189

Merged
andrej merged 3 commits into
amd:develfrom
atassis:fix/gemm-tile-divisibility-check
Sep 11, 2026
Merged

gemm: check tile sizes against the kernel's divisibility rule, not a bound#189
andrej merged 3 commits into
amd:develfrom
atassis:fix/gemm-tile-divisibility-check

Conversation

@atassis

@atassis atassis commented Sep 8, 2026

Copy link
Copy Markdown
Contributor

GEMM.__post_init__ checks tile_m, tile_k, tile_n against a minimum with >=, but aie_kernels/aie2p/mm.cc's matmul_vectorized_*_bf16_* kernels static_assert(m % (2*r) == 0) and static_assert(n % (2*t) == 0) for the (r, t) pair emulate_bf16_mmul_with_bfp16 selects (r=t=8 when enabled, the default; r=4, t=8 otherwise) -- a divisibility rule, not a lower bound. Both tile_m and tile_n are affected, in both regimes: tile_m=8 passes the old check under the default emulation but needs a multiple of 16; tile_m=4 passes it without emulation but needs a multiple of 8. GEMM(tile_m=8, emulate_bf16_mmul_with_bfp16=True, ...) constructs without error and fails the static_assert at kernel compile time, in a file this class never names. tile_k is the one dimension matmul_vectorized_2x2_mmul does not expand, so its rule is k % s == 0 with s=8 in both regimes. That is still a divisibility rule rather than a bound, so this does tighten tile_k as well: tile_k=12 passed the old >= 8 check and is now rejected, correctly -- mm.cc would have refused it.

The existing test suite doesn't cover this: test.py hardcodes emulate_bf16_mmul_with_bfp16=False, and its one tile_m=8 case (extensive_params, M=2048,K=2048,N=2048,m=8,k=16,n=32) only survives because 2*r == 8 in that branch -- the default-emulation boundary was untested.

Added

  • iron/tests/operators/gemm_tile_divisibility.py: construction-only tests (no device, no MLIR generation) covering both tile_m and tile_n under both emulate_bf16_mmul_with_bfp16 settings, plus tile_k.

Changed

  • iron/operators/gemm/op.py: __post_init__ now checks tile_m % (2*r) == 0, tile_k % s == 0, tile_n % (2*t) == 0 instead of >=, and the error message names the required multiple and the source file.

Removed

Known gap

design.py's own guard (if not use_scalar: assert m % r == 0; assert n % t == 0) is a second, independently-too-weak check -- it's missing the same 2* factor, and use_scalar doesn't gate it out: the extern "C" block always emits both the scalar and vectorized symbols (combos(matmul_vectorized_c_func) combos(matmul_scalar_c_func) ...), so the vectorized static_assert fires at compile time even for a scalar-only build. Not fixed here since GEMM (this PR's scope) always calls design.py with already-validated tiles; a direct design.py CLI/API caller is still exposed.

Evidence

$ PYTHONPATH=. python3 -m pytest --noconftest iron/tests/operators/gemm_tile_divisibility.py -v
======================== test session starts ========================
collected 6 items

gemm_tile_divisibility.py::test_tile_m_that_only_satisfies_the_old_greater_equal_check_is_rejected PASSED
gemm_tile_divisibility.py::test_tile_m_multiple_of_16_is_accepted_under_emulation PASSED
gemm_tile_divisibility.py::test_tile_m_multiple_of_8_is_accepted_without_emulation PASSED
gemm_tile_divisibility.py::test_tile_n_not_a_multiple_of_16_is_rejected_regardless_of_emulation PASSED
gemm_tile_divisibility.py::test_tile_m_that_only_satisfies_the_old_check_is_rejected_without_emulation PASSED
gemm_tile_divisibility.py::test_tile_k_not_a_multiple_of_8_is_rejected PASSED

======================== 6 passed in 0.29s ========================

Ran with --noconftest: this repo's root conftest.py opens the NPU unconditionally at collection time (see the companion PR fixing that), which this change has nothing to do with, so it's bypassed here rather than exercised.

Confirmed the defect against unmodified devel (deb6e1e7) before writing the fix: GEMM(M=512, K=512, N=512, tile_m=8, tile_k=64, tile_n=64, emulate_bf16_mmul_with_bfp16=True, context=None) constructs with no error.

PR Merge Checklist

  1. The PR is rebased on the latest devel commit and pointing to devel.
  2. Your PR has been reviewed and approved.
  3. All checks are passing.

Comment thread iron/operators/gemm/op.py Outdated
Comment on lines +64 to +70
# r, s, t are the aie::mmul tile dims the bf16 kernel is built from
# (aie_kernels/aie2p/mm.cc, matmul_vectorized_2x2_mmul): it expands A
# and B 2x in m and n, so the static_asserts there require
# m % (2*r) == 0, k % s == 0, n % (2*t) == 0 -- a divisibility rule,
# not a lower bound. A tile_m/tile_n that merely meets the old ">="
# check (e.g. 8 or 12) passes here and then fails that static_assert
# at kernel compile time, in a file this class never names.

Copy link
Copy Markdown
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Suggested change
# r, s, t are the aie::mmul tile dims the bf16 kernel is built from
# (aie_kernels/aie2p/mm.cc, matmul_vectorized_2x2_mmul): it expands A
# and B 2x in m and n, so the static_asserts there require
# m % (2*r) == 0, k % s == 0, n % (2*t) == 0 -- a divisibility rule,
# not a lower bound. A tile_m/tile_n that merely meets the old ">="
# check (e.g. 8 or 12) passes here and then fails that static_assert
# at kernel compile time, in a file this class never names.
# r, s, t are the aie::mmul tile dims the bf16 kernel is built from
# (aie_kernels/aie2p/mm.cc, matmul_vectorized_2x2_mmul)

tile_k is genuinely undoubled (k % s == 0, s=8 in both regimes), so its old
`>= 8` bound was already correct; it is included here for the same divisor,
expressed the same way as tile_m/tile_n.
"""

Copy link
Copy Markdown
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Can we please stop documenting code changes in comments?


def test_tile_k_not_a_multiple_of_8_is_rejected():
# tile_k=4 still divides K=512 evenly (the outer K % tile_k check), so
# this exercises the new s-divisibility check rather than that one.

Copy link
Copy Markdown
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

"new"

…ones

__post_init__ checked tile_m/tile_k/tile_n >= a minimum, but
aie_kernels/aie2p/mm.cc static_asserts m % (2*r) == 0 and n % (2*t) == 0
for the (r,t) mmul shape emulate_bf16_mmul_with_bfp16 selects -- a
divisibility rule, not a lower bound. tile_m=8 under the default
emulation passed the old check and failed that static_assert at kernel
compile time. Check the real rule and name the offending value.
Add the tile_m=4 (no-emulation) and tile_n-under-emulation cases so both
tile_m and tile_n are exercised in both emulate_bf16_mmul_with_bfp16
settings, not just the default.
@atassis
atassis force-pushed the fix/gemm-tile-divisibility-check branch from e733bf7 to a3d5181 Compare September 11, 2026 17:14
@andrej
andrej enabled auto-merge September 11, 2026 21:33
@github-actions

github-actions Bot commented Sep 11, 2026

Copy link
Copy Markdown
Contributor

CI Test Results

8fd5fe0 (2026_09_11_22_17_26)

IRON - CI Summary

Examples

iron/applications/llama_3.2_1b
Test Krackan Status Krackan Phoenix Status Phoenix
test_llama_3_2_1b[llama_3.2_1b_prompt_1024_tokens_1] - - -
test_llama_3_2_1b[llama_3.2_1b_prompt_1024_tokens_40] - - -
test_llama_3_2_1b[llama_3.2_1b_prompt_13_tokens_1] - - -
test_llama_3_2_1b[llama_3.2_1b_prompt_13_tokens_40] - - -

Small

iron/operators/axpy
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_axpy[input_length_2048-num_aie_columns_1-tile_size_2048-scalar_factor_3.0] 175.92 411.76
test_axpy[input_length_2048-num_aie_columns_2-tile_size_1024-scalar_factor_3.0] 179.10 662.12
test_axpy[input_length_2048-num_aie_columns_4-tile_size_512-scalar_factor_3.0] 182.14 383.60
test_axpy[input_length_2048-num_aie_columns_8-tile_size_256-scalar_factor_3.0] 221.96 - -
iron/operators/dequant
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_dequant[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-group_size_32] 186.34 437.28
test_dequant[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-group_size_32] 176.24 376.90
test_dequant[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-group_size_32] 161.40 287.86
test_dequant[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-group_size_32] 171.10 387.90
test_dequant[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-group_size_32] 193.14 805.44
test_dequant[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-group_size_32] 196.90 497.70
test_dequant[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-group_size_32] 201.46 - -
test_dequant[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128-group_size_32] 229.64 - -
iron/operators/elementwise_add
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_elementwise_add[input_length_2048-num_aie_columns_1-tile_size_2048] 191.00 309.50
test_elementwise_add[input_length_2048-num_aie_columns_2-tile_size_1024] 180.02 386.00
test_elementwise_add[input_length_2048-num_aie_columns_4-tile_size_512] 168.62 343.46
test_elementwise_add[input_length_2048-num_aie_columns_8-tile_size_256] 201.90 - -
iron/operators/elementwise_mul
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_elementwise_mul[input_length_2048-num_aie_columns_1-tile_size_2048] 132.68 364.74
test_elementwise_mul[input_length_2048-num_aie_columns_2-tile_size_1024] 149.94 383.24
test_elementwise_mul[input_length_2048-num_aie_columns_4-tile_size_512] 171.40 308.56
test_elementwise_mul[input_length_2048-num_aie_columns_8-tile_size_256] 167.02 - -
iron/operators/gelu
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_gelu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048] 156.04 614.48
test_gelu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024] 133.66 346.56
test_gelu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024] 157.24 372.64
test_gelu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512] 161.32 371.32
test_gelu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512] 163.44 331.62
test_gelu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256] 173.70 442.32
test_gelu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256] 169.60 - -
test_gelu[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128] 218.70 - -
iron/operators/gemm
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_gemm[M_1792-K_896-N_1152-num_aie_columns_8-b_col_maj_False-c_col_maj_True-m_64-k_32-n_48-trace_size_0-partition_N_1] 2332.80 - -
test_gemm[M_192-K_384-N_64-num_aie_columns_4-b_col_maj_False-c_col_maj_False-m_48-k_96-n_16-trace_size_0-partition_N_1] 241.28 843.44
test_gemm[M_192-K_384-N_64-num_aie_columns_4-b_col_maj_True-c_col_maj_True-m_48-k_96-n_16-trace_size_0-partition_N_1] 297.82 512.64
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_1-b_col_maj_False-c_col_maj_False-m_64-k_64-n_64-trace_size_0-partition_N_1] 48504.92 83588.24
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_2-b_col_maj_True-c_col_maj_False-m_64-k_64-n_64-trace_size_0-partition_N_1] 28355.96 25035.58
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_8-b_col_maj_True-c_col_maj_True-m_64-k_64-n_64-trace_size_0-partition_N_1] 7715.86 - -
test_gemm[M_384-K_1536-N_1792-num_aie_columns_4-b_col_maj_True-c_col_maj_False-m_32-k_48-n_64-trace_size_0-partition_N_1] 2321.32 4017.18
test_gemm[M_64-K_512-N_256-num_aie_columns_4-b_col_maj_True-c_col_maj_False-m_16-k_64-n_64-trace_size_0-partition_N_4] 3601.32 5779.18
test_gemm[M_896-K_1792-N_640-num_aie_columns_8-b_col_maj_False-c_col_maj_True-m_32-k_64-n_80-trace_size_0-partition_N_1] 1661.16 - -
iron/operators/gemv
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_gemv[M_128-K_128-num_aie_columns_1-tile_size_input_32-tile_size_output_128] 0.20 0.09
test_gemv[M_2048-K_8192-num_aie_columns_1-tile_size_input_1-tile_size_output_2048] 12.26 3.65
test_gemv[M_2048-K_8192-num_aie_columns_2-tile_size_input_1-tile_size_output_1024] 24.46 6.72
test_gemv[M_2048-K_8192-num_aie_columns_4-tile_size_input_1-tile_size_output_512] 40.04 10.47
test_gemv[M_2048-K_8192-num_aie_columns_8-tile_size_input_1-tile_size_output_256] 43.20 - -
test_gemv[M_8192-K_2048-num_aie_columns_1-tile_size_input_4-tile_size_output_1024] 12.65 3.69
test_gemv[M_8192-K_2048-num_aie_columns_2-tile_size_input_4-tile_size_output_1024] 24.49 6.53
test_gemv[M_8192-K_2048-num_aie_columns_4-tile_size_input_4-tile_size_output_1024] 40.84 9.89
test_gemv[M_8192-K_2048-num_aie_columns_8-tile_size_input_4-tile_size_output_1024] 38.95 - -
test_gemv_batched[M_1024-K_1024-num_aie_columns_1-tile_size_input_1-tile_size_output_64-num_batches_2] 9.25 2.25
test_gemv_batched[M_1026-K_64-num_aie_columns_1-tile_size_input_1-tile_size_output_2-num_batches_2] 0.91 0.40
test_gemv_batched[M_256-K_128-num_aie_columns_1-tile_size_input_1-tile_size_output_256-num_batches_4] 1.29 0.52
test_gemv_batched[M_256-K_128-num_aie_columns_8-tile_size_input_1-tile_size_output_32-num_batches_100] 16.35 - -
test_gemv_batched[M_448-K_64-num_aie_columns_8-tile_size_input_1-tile_size_output_56-num_batches_192] 13.95 - -
test_gemv_batched[M_512-K_64-num_aie_columns_8-tile_size_input_4-tile_size_output_64-num_batches_32] 7.86 - -
test_gemv_batched[M_64-K_1536-num_aie_columns_1-tile_size_input_1-tile_size_output_64-num_batches_8] 6.27 1.01
test_gemv_gelu[M_128-K_128-num_aie_columns_1-tile_size_input_32-tile_size_output_128] 0.22 -
test_gemv_gelu[M_2048-K_8192-num_aie_columns_1-tile_size_input_1-tile_size_output_2048] 12.56 -
test_gemv_gelu[M_8192-K_2048-num_aie_columns_1-tile_size_input_4-tile_size_output_1024] 12.01 -
iron/operators/layer_norm
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_layer_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048] 178.12 422.66
test_layer_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024] 158.26 724.32
test_layer_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024] 185.72 329.80
test_layer_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512] 171.62 396.98
test_layer_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512] 168.52 397.44
test_layer_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256] 188.40 496.42
test_layer_norm[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256] 204.84 - -
test_layer_norm[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128] 196.54 - -
iron/operators/leaky_relu
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.01] 182.20 457.06
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.1] 160.28 390.88
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.25] 162.82 448.86
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-alpha_0.01] 176.94 386.38
test_leaky_relu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-alpha_0.01] 183.76 473.68
test_leaky_relu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-alpha_0.01] 164.64 434.72
test_leaky_relu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-alpha_0.01] 191.46 397.46
test_leaky_relu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-alpha_0.01] 160.70 445.68
test_leaky_relu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-alpha_0.01] 213.16 - -
test_leaky_relu[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128-alpha_0.01] 215.94 - -
iron/operators/mem_copy
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_mem_copy[input_length_2048-num_cores_1-num_channels_1-bypass_False-tile_size_2048] 142.62 371.74
test_mem_copy[input_length_2048-num_cores_16-num_channels_2-bypass_False-tile_size_128] 214.08 - -
test_mem_copy[input_length_2048-num_cores_2-num_channels_1-bypass_False-tile_size_1024] 185.24 349.96
test_mem_copy[input_length_2048-num_cores_2-num_channels_2-bypass_False-tile_size_1024] 160.68 390.00
test_mem_copy[input_length_2048-num_cores_4-num_channels_1-bypass_False-tile_size_512] 189.82 481.58
test_mem_copy[input_length_2048-num_cores_4-num_channels_2-bypass_False-tile_size_512] 157.92 354.30
test_mem_copy[input_length_2048-num_cores_8-num_channels_1-bypass_False-tile_size_256] 190.74 - -
test_mem_copy[input_length_2048-num_cores_8-num_channels_2-bypass_False-tile_size_256] 194.28 401.52
iron/operators/mha
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_mha[seq_len_16384-dim_64-num_heads_1-num_pipelines_8-num_kv_heads_0] 47448.30 - -
iron/operators/relu
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048] 160.22 373.78
test_relu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024] 160.92 402.34
test_relu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024] 167.44 395.44
test_relu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512] 156.96 467.12
test_relu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512] 171.74 447.50
test_relu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256] 191.40 565.64
test_relu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256] 195.24 - -
test_relu[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128] 239.60 - -
iron/operators/repeat
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_cols_without_a_legal_split_is_rejected[cols_1031-why_prime > 1023: the only divisors are 1 and cols, neither legal] - -
test_cols_without_a_legal_split_is_rejected[cols_2062-why_2 x 1031: the only word-aligned chunk leaves a 1031-wide chunk count] - -
test_cols_without_a_legal_split_is_rejected[cols_513-why_odd: every divisor is odd, so no chunk is a whole 32-bit word] - -
test_repeat[rows_4-cols_1024-repeat_2-transfer_size_None] 188.16 341.20
test_repeat[rows_8-cols_512-repeat_4-transfer_size_64] 179.86 644.64
test_repeat[rows_8-cols_64-repeat_4-transfer_size_None] 183.24 338.52
iron/operators/rms_norm
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-weighted_False] 164.06 311.62
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-weighted_True] 187.32 653.96
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-weighted_False] 185.08 394.12
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-weighted_True] 172.40 392.24
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-weighted_False] 187.02 318.80
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-weighted_True] 200.48 655.80
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-weighted_False] 192.06 397.46
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-weighted_True] 210.28 425.76
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-weighted_False] 185.24 411.88
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-weighted_True] 179.24 446.28
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-weighted_False] 170.50 375.88
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-weighted_True] 208.94 - -
test_rms_norm[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-weighted_False] 199.60 - -
test_rms_norm[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-weighted_True] 224.00 - -
test_rms_norm[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128-weighted_False] 198.76 - -
iron/operators/rope
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_1-method_type_0] 160.30 550.44
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_2-method_type_0] 162.00 368.76
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_4-method_type_0] 160.14 443.86
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_8-method_type_0] 212.28 - -
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_1-method_type_0] 163.16 411.96
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_2-method_type_0] 155.92 329.86
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_4-method_type_0] 204.72 419.52
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_8-method_type_0] 186.76 - -
iron/operators/sigmoid
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_sigmoid[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048] 206.64 685.70
test_sigmoid[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024] 129.04 352.74
test_sigmoid[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024] 155.86 516.88
test_sigmoid[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512] 147.54 894.40
test_sigmoid[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512] 158.74 558.06
test_sigmoid[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256] 165.38 496.90
test_sigmoid[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256] 175.06 - -
test_sigmoid[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128] 207.90 - -
iron/operators/silu
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_silu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048] 165.36 613.10
test_silu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024] 153.04 522.88
test_silu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512] 149.34 488.62
test_silu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256] 183.80 - -
iron/operators/softmax
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_1024] 167.38 451.82
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_2048] 174.16 490.08
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_512] 169.92 502.24
iron/operators/strided_copy
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_strided_copy[chunked_transfer] 197.40 315.42
test_strided_copy[contiguous] 167.54 324.12
test_strided_copy[four_channels] 159.62 351.10
test_strided_copy[kv_slot0] 160.82 297.80
test_strided_copy[kv_slot5] 170.70 321.28
test_strided_copy[kv_slot5_four_channels] 182.42 388.76
test_strided_copy[kv_slot5_two_channels] 203.44 379.14
test_strided_copy[kv_slot_last] 191.06 356.62
test_strided_copy[two_channels] 201.88 322.90
test_strided_copy[two_channels_chunked] 171.76 306.48
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter0] - -
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter1] - -
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter2] - -
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter3] - -
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter4] - -
iron/operators/swiglu_decode
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_swiglu_decode[embedding_dim_1024-hidden_dim_3584] 954.15 9622.17
test_swiglu_decode[embedding_dim_2048-hidden_dim_2048] 1004.71 13314.94
iron/operators/swiglu_prefill
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_swiglu_prefill[seq_len_256-embedding_dim_2048-hidden_dim_2048-prio_accuracy_False] 2191.94 16955.66
iron/operators/tanh
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_tanh[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048] 166.66 445.60
test_tanh[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024] 185.56 369.72
test_tanh[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024] 185.90 376.20
test_tanh[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512] 203.90 905.14
test_tanh[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512] 194.08 689.34
test_tanh[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256] 172.78 484.88
test_tanh[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256] 174.26 - -
test_tanh[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128] 230.86 - -
iron/operators/transpose
Test Krackan Status Krackan Latency (mean) Phoenix Status Phoenix Latency (mean)
test_transpose[M_2048-N_64-aie_columns_1-channels_1-m_64-n_64-s_8-num_batches_1] 171.58 622.94
test_transpose[M_2048-N_64-aie_columns_1-channels_1-m_64-n_64-s_8-num_batches_2] 212.10 901.52
test_transpose[M_2048-N_64-aie_columns_1-channels_2-m_64-n_64-s_8-num_batches_1] 180.74 585.16
Krackan - Small

IRON

Tested on 2026_09_11_22_17_26 at commit 8fd5fe0.

iron/operators/axpy
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_axpy[input_length_2048-num_aie_columns_1-tile_size_2048-scalar_factor_3.0]✅ 5/5175.920.07n/a
test_axpy[input_length_2048-num_aie_columns_2-tile_size_1024-scalar_factor_3.0]✅ 5/5179.100.07n/a
test_axpy[input_length_2048-num_aie_columns_4-tile_size_512-scalar_factor_3.0]✅ 5/5182.140.07n/a
test_axpy[input_length_2048-num_aie_columns_8-tile_size_256-scalar_factor_3.0]✅ 5/5221.960.06n/a
iron/operators/dequant
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_dequant[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-group_size_32]✅ 5/5186.340.03n/a
test_dequant[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-group_size_32]✅ 5/5176.240.03n/a
test_dequant[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-group_size_32]✅ 5/5161.400.03n/a
test_dequant[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-group_size_32]✅ 5/5171.100.03n/a
test_dequant[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-group_size_32]✅ 5/5193.140.03n/a
test_dequant[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-group_size_32]✅ 5/5196.900.03n/a
test_dequant[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-group_size_32]✅ 5/5201.460.03n/a
test_dequant[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128-group_size_32]✅ 5/5229.640.02n/a
iron/operators/elementwise_add
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_elementwise_add[input_length_2048-num_aie_columns_1-tile_size_2048]✅ 5/5191.000.07n/a
test_elementwise_add[input_length_2048-num_aie_columns_2-tile_size_1024]✅ 5/5180.020.07n/a
test_elementwise_add[input_length_2048-num_aie_columns_4-tile_size_512]✅ 5/5168.620.07n/a
test_elementwise_add[input_length_2048-num_aie_columns_8-tile_size_256]✅ 5/5201.900.06n/a
iron/operators/elementwise_mul
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_elementwise_mul[input_length_2048-num_aie_columns_1-tile_size_2048]✅ 5/5132.680.09n/a
test_elementwise_mul[input_length_2048-num_aie_columns_2-tile_size_1024]✅ 5/5149.940.08n/a
test_elementwise_mul[input_length_2048-num_aie_columns_4-tile_size_512]✅ 5/5171.400.07n/a
test_elementwise_mul[input_length_2048-num_aie_columns_8-tile_size_256]✅ 5/5167.020.08n/a
iron/operators/gelu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_gelu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5156.040.05n/a
test_gelu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5133.660.06n/a
test_gelu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5157.240.06n/a
test_gelu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5161.320.05n/a
test_gelu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5163.440.05n/a
test_gelu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5173.700.05n/a
test_gelu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256]✅ 5/5169.600.05n/a
test_gelu[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128]✅ 5/5218.700.04n/a
iron/operators/gemm
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_gemm[M_1792-K_896-N_1152-num_aie_columns_8-b_col_maj_False-c_col_maj_True-m_64-k_32-n_48-trace_size_0-partition_N_1]✅ 5/52332.804.041587.58
test_gemm[M_192-K_384-N_64-num_aie_columns_4-b_col_maj_False-c_col_maj_False-m_48-k_96-n_16-trace_size_0-partition_N_1]✅ 5/5241.280.9841.76
test_gemm[M_192-K_384-N_64-num_aie_columns_4-b_col_maj_True-c_col_maj_True-m_48-k_96-n_16-trace_size_0-partition_N_1]✅ 5/5297.820.7833.24
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_1-b_col_maj_False-c_col_maj_False-m_64-k_64-n_64-trace_size_0-partition_N_1]✅ 5/548504.920.52354.19
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_2-b_col_maj_True-c_col_maj_False-m_64-k_64-n_64-trace_size_0-partition_N_1]✅ 5/528355.960.89605.87
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_8-b_col_maj_True-c_col_maj_True-m_64-k_64-n_64-trace_size_0-partition_N_1]✅ 5/57715.863.262227.44
test_gemm[M_384-K_1536-N_1792-num_aie_columns_4-b_col_maj_True-c_col_maj_False-m_32-k_48-n_64-trace_size_0-partition_N_1]✅ 5/52321.323.51920.57
test_gemm[M_64-K_512-N_256-num_aie_columns_4-b_col_maj_True-c_col_maj_False-m_16-k_64-n_64-trace_size_0-partition_N_4]✅ 5/53601.320.3619.55
test_gemm[M_896-K_1792-N_640-num_aie_columns_8-b_col_maj_False-c_col_maj_True-m_32-k_64-n_80-trace_size_0-partition_N_1]✅ 5/51661.164.161284.85
iron/operators/gemv
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_gemv[M_128-K_128-num_aie_columns_1-tile_size_input_32-tile_size_output_128]✅ 5/5n/a0.200.20
test_gemv[M_2048-K_8192-num_aie_columns_1-tile_size_input_1-tile_size_output_2048]✅ 5/5n/a12.2612.25
test_gemv[M_2048-K_8192-num_aie_columns_2-tile_size_input_1-tile_size_output_1024]✅ 5/5n/a24.4624.45
test_gemv[M_2048-K_8192-num_aie_columns_4-tile_size_input_1-tile_size_output_512]✅ 5/5n/a40.0440.01
test_gemv[M_2048-K_8192-num_aie_columns_8-tile_size_input_1-tile_size_output_256]✅ 5/5n/a43.2043.18
test_gemv[M_8192-K_2048-num_aie_columns_1-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a12.6512.64
test_gemv[M_8192-K_2048-num_aie_columns_2-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a24.4924.48
test_gemv[M_8192-K_2048-num_aie_columns_4-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a40.8440.81
test_gemv[M_8192-K_2048-num_aie_columns_8-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a38.9538.93
test_gemv_batched[M_1024-K_1024-num_aie_columns_1-tile_size_input_1-tile_size_output_64-num_batches_2]✅ 5/5n/a9.259.23
test_gemv_batched[M_1026-K_64-num_aie_columns_1-tile_size_input_1-tile_size_output_2-num_batches_2]✅ 5/5n/a0.910.90
test_gemv_batched[M_256-K_128-num_aie_columns_1-tile_size_input_1-tile_size_output_256-num_batches_4]✅ 5/5n/a1.291.27
test_gemv_batched[M_256-K_128-num_aie_columns_8-tile_size_input_1-tile_size_output_32-num_batches_100]✅ 5/5n/a16.3516.17
test_gemv_batched[M_448-K_64-num_aie_columns_8-tile_size_input_1-tile_size_output_56-num_batches_192]✅ 5/5n/a13.9513.71
test_gemv_batched[M_512-K_64-num_aie_columns_8-tile_size_input_4-tile_size_output_64-num_batches_32]✅ 5/5n/a7.867.72
test_gemv_batched[M_64-K_1536-num_aie_columns_1-tile_size_input_1-tile_size_output_64-num_batches_8]✅ 5/5n/a6.276.17
test_gemv_gelu[M_128-K_128-num_aie_columns_1-tile_size_input_32-tile_size_output_128]✅ 5/5n/a0.220.21
test_gemv_gelu[M_2048-K_8192-num_aie_columns_1-tile_size_input_1-tile_size_output_2048]✅ 5/5n/a12.5612.55
test_gemv_gelu[M_8192-K_2048-num_aie_columns_1-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a12.0112.00
iron/operators/layer_norm
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_layer_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5178.120.05n/a
test_layer_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5158.260.05n/a
test_layer_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5185.720.05n/a
test_layer_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5171.620.05n/a
test_layer_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5168.520.05n/a
test_layer_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5188.400.04n/a
test_layer_norm[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256]✅ 5/5204.840.04n/a
test_layer_norm[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128]✅ 5/5196.540.04n/a
iron/operators/leaky_relu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.01]✅ 5/5182.200.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.1]✅ 5/5160.280.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.25]✅ 5/5162.820.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-alpha_0.01]✅ 5/5176.940.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-alpha_0.01]✅ 5/5183.760.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-alpha_0.01]✅ 5/5164.640.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-alpha_0.01]✅ 5/5191.460.04n/a
test_leaky_relu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-alpha_0.01]✅ 5/5160.700.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-alpha_0.01]✅ 5/5213.160.05n/a
test_leaky_relu[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128-alpha_0.01]✅ 5/5215.940.04n/a
iron/operators/mem_copy
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_mem_copy[input_length_2048-num_cores_1-num_channels_1-bypass_False-tile_size_2048]✅ 5/5142.620.06n/a
test_mem_copy[input_length_2048-num_cores_16-num_channels_2-bypass_False-tile_size_128]✅ 5/5214.080.04n/a
test_mem_copy[input_length_2048-num_cores_2-num_channels_1-bypass_False-tile_size_1024]✅ 5/5185.240.05n/a
test_mem_copy[input_length_2048-num_cores_2-num_channels_2-bypass_False-tile_size_1024]✅ 5/5160.680.05n/a
test_mem_copy[input_length_2048-num_cores_4-num_channels_1-bypass_False-tile_size_512]✅ 5/5189.820.05n/a
test_mem_copy[input_length_2048-num_cores_4-num_channels_2-bypass_False-tile_size_512]✅ 5/5157.920.05n/a
test_mem_copy[input_length_2048-num_cores_8-num_channels_1-bypass_False-tile_size_256]✅ 5/5190.740.04n/a
test_mem_copy[input_length_2048-num_cores_8-num_channels_2-bypass_False-tile_size_256]✅ 5/5194.280.04n/a
iron/operators/mha
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_mha[seq_len_16384-dim_64-num_heads_1-num_pipelines_8-num_kv_heads_0]✅ 5/547448.300.18n/a
iron/operators/relu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5160.220.05n/a
test_relu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5160.920.05n/a
test_relu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5167.440.05n/a
test_relu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5156.960.05n/a
test_relu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5171.740.05n/a
test_relu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5191.400.04n/a
test_relu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256]✅ 5/5195.240.04n/a
test_relu[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128]✅ 5/5239.600.03n/a
iron/operators/repeat
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_cols_without_a_legal_split_is_rejected[cols_1031-why_prime > 1023: the only divisors are 1 and cols, neither legal]✅ 5/5n/an/an/a
test_cols_without_a_legal_split_is_rejected[cols_2062-why_2 x 1031: the only word-aligned chunk leaves a 1031-wide chunk count]✅ 5/5n/an/an/a
test_cols_without_a_legal_split_is_rejected[cols_513-why_odd: every divisor is odd, so no chunk is a whole 32-bit word]✅ 5/5n/an/an/a
test_repeat[rows_4-cols_1024-repeat_2-transfer_size_None]✅ 5/5188.160.13n/a
test_repeat[rows_8-cols_512-repeat_4-transfer_size_64]✅ 5/5179.860.23n/a
test_repeat[rows_8-cols_64-repeat_4-transfer_size_None]✅ 5/5183.240.03n/a
iron/operators/rms_norm
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-weighted_False]✅ 5/5164.060.05n/a
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-weighted_True]✅ 5/5187.320.07n/a
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-weighted_False]✅ 5/5185.080.05n/a
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-weighted_True]✅ 5/5172.400.06n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-weighted_False]✅ 5/5187.020.04n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-weighted_True]✅ 5/5200.480.05n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-weighted_False]✅ 5/5192.060.05n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-weighted_True]✅ 5/5210.280.05n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-weighted_False]✅ 5/5185.240.05n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-weighted_True]✅ 5/5179.240.05n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-weighted_False]✅ 5/5170.500.05n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-weighted_True]✅ 5/5208.940.04n/a
test_rms_norm[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-weighted_False]✅ 5/5199.600.04n/a
test_rms_norm[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256-weighted_True]✅ 5/5224.000.04n/a
test_rms_norm[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128-weighted_False]✅ 5/5198.760.04n/a
iron/operators/rope
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_1-method_type_0]✅ 5/5160.300.63n/a
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_2-method_type_0]✅ 5/5162.000.63n/a
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_4-method_type_0]✅ 5/5160.140.64n/a
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_8-method_type_0]✅ 5/5212.280.47n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_1-method_type_0]✅ 5/5163.160.46n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_2-method_type_0]✅ 5/5155.920.49n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_4-method_type_0]✅ 5/5204.720.37n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_8-method_type_0]✅ 5/5186.760.40n/a
iron/operators/sigmoid
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_sigmoid[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5206.640.05n/a
test_sigmoid[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5129.040.07n/a
test_sigmoid[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5155.860.05n/a
test_sigmoid[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5147.540.06n/a
test_sigmoid[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5158.740.06n/a
test_sigmoid[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5165.380.05n/a
test_sigmoid[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256]✅ 5/5175.060.05n/a
test_sigmoid[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128]✅ 5/5207.900.04n/a
iron/operators/silu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_silu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5165.360.05n/a
test_silu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5153.040.05n/a
test_silu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5149.340.06n/a
test_silu[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256]✅ 5/5183.800.05n/a
iron/operators/softmax
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_1024]✅ 5/5167.380.81n/a
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_2048]✅ 5/5174.160.79n/a
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5169.920.81n/a
iron/operators/strided_copy
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_strided_copy[chunked_transfer]✅ 5/5197.400.02n/a
test_strided_copy[contiguous]✅ 5/5167.540.03n/a
test_strided_copy[four_channels]✅ 5/5159.620.03n/a
test_strided_copy[kv_slot0]✅ 5/5160.820.87n/a
test_strided_copy[kv_slot5]✅ 5/5170.700.78n/a
test_strided_copy[kv_slot5_four_channels]✅ 5/5182.420.75n/a
test_strided_copy[kv_slot5_two_channels]✅ 5/5203.440.70n/a
test_strided_copy[kv_slot_last]✅ 5/5191.060.75n/a
test_strided_copy[two_channels]✅ 5/5201.880.02n/a
test_strided_copy[two_channels_chunked]✅ 5/5171.760.02n/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter0]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter1]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter2]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter3]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter4]✅ 1/1n/an/an/a
iron/operators/swiglu_decode
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_swiglu_decode[embedding_dim_1024-hidden_dim_3584]✅ 5/5954.150.00n/a
test_swiglu_decode[embedding_dim_2048-hidden_dim_2048]✅ 5/51004.710.01n/a
iron/operators/swiglu_prefill
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_swiglu_prefill[seq_len_256-embedding_dim_2048-hidden_dim_2048-prio_accuracy_False]✅ 5/52191.940.96n/a
iron/operators/tanh
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_tanh[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5166.660.05n/a
test_tanh[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5185.560.05n/a
test_tanh[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5185.900.05n/a
test_tanh[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5203.900.04n/a
test_tanh[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5194.080.04n/a
test_tanh[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5172.780.05n/a
test_tanh[input_length_2048-num_aie_columns_8-num_channels_1-tile_size_256]✅ 5/5174.260.05n/a
test_tanh[input_length_2048-num_aie_columns_8-num_channels_2-tile_size_128]✅ 5/5230.860.04n/a
iron/operators/transpose
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_transpose[M_2048-N_64-aie_columns_1-channels_1-m_64-n_64-s_8-num_batches_1]✅ 5/5171.583.08n/a
test_transpose[M_2048-N_64-aie_columns_1-channels_1-m_64-n_64-s_8-num_batches_2]✅ 5/5212.104.96n/a
test_transpose[M_2048-N_64-aie_columns_1-channels_2-m_64-n_64-s_8-num_batches_1]✅ 5/5180.742.91n/a
Krackan - Examples

IRON

Tested on 2026_09_11_22_00_52 at commit 8fd5fe0.

iron/applications/llama_3.2_1b
TestChecksTTFT (mean)TPS (mean)
test_llama_3_2_1b[llama_3.2_1b_prompt_1024_tokens_1]✅ 5/52.05n/a
test_llama_3_2_1b[llama_3.2_1b_prompt_1024_tokens_40]✅ 5/52.087.83
test_llama_3_2_1b[llama_3.2_1b_prompt_13_tokens_1]✅ 5/52.02n/a
test_llama_3_2_1b[llama_3.2_1b_prompt_13_tokens_40]✅ 5/52.017.62
Phoenix - Small

IRON

Tested on 2026_09_11_22_11_53 at commit 8fd5fe0.

iron/operators/axpy
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_axpy[input_length_2048-num_aie_columns_1-tile_size_2048-scalar_factor_3.0]✅ 5/5411.760.03n/a
test_axpy[input_length_2048-num_aie_columns_2-tile_size_1024-scalar_factor_3.0]✅ 5/5662.120.03n/a
test_axpy[input_length_2048-num_aie_columns_4-tile_size_512-scalar_factor_3.0]✅ 5/5383.600.03n/a
iron/operators/dequant
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_dequant[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-group_size_32]✅ 5/5437.280.01n/a
test_dequant[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-group_size_32]✅ 5/5376.900.02n/a
test_dequant[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-group_size_32]✅ 5/5287.860.02n/a
test_dequant[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-group_size_32]✅ 5/5387.900.01n/a
test_dequant[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-group_size_32]✅ 5/5805.440.01n/a
test_dequant[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-group_size_32]✅ 5/5497.700.01n/a
iron/operators/elementwise_add
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_elementwise_add[input_length_2048-num_aie_columns_1-tile_size_2048]✅ 5/5309.500.04n/a
test_elementwise_add[input_length_2048-num_aie_columns_2-tile_size_1024]✅ 5/5386.000.04n/a
test_elementwise_add[input_length_2048-num_aie_columns_4-tile_size_512]✅ 5/5343.460.04n/a
iron/operators/elementwise_mul
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_elementwise_mul[input_length_2048-num_aie_columns_1-tile_size_2048]✅ 5/5364.740.04n/a
test_elementwise_mul[input_length_2048-num_aie_columns_2-tile_size_1024]✅ 5/5383.240.04n/a
test_elementwise_mul[input_length_2048-num_aie_columns_4-tile_size_512]✅ 5/5308.560.04n/a
iron/operators/gelu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_gelu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5614.480.03n/a
test_gelu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5346.560.03n/a
test_gelu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5372.640.02n/a
test_gelu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5371.320.03n/a
test_gelu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5331.620.03n/a
test_gelu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5442.320.02n/a
iron/operators/gemm
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_gemm[M_192-K_384-N_64-num_aie_columns_4-b_col_maj_False-c_col_maj_False-m_48-k_96-n_16-trace_size_0-partition_N_1]✅ 5/5843.440.3314.10
test_gemm[M_192-K_384-N_64-num_aie_columns_4-b_col_maj_True-c_col_maj_True-m_48-k_96-n_16-trace_size_0-partition_N_1]✅ 5/5512.640.4418.97
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_1-b_col_maj_False-c_col_maj_False-m_64-k_64-n_64-trace_size_0-partition_N_1]✅ 5/583588.240.30205.59
test_gemm[M_2048-K_2048-N_2048-num_aie_columns_2-b_col_maj_True-c_col_maj_False-m_64-k_64-n_64-trace_size_0-partition_N_1]✅ 5/525035.581.01686.42
test_gemm[M_384-K_1536-N_1792-num_aie_columns_4-b_col_maj_True-c_col_maj_False-m_32-k_48-n_64-trace_size_0-partition_N_1]✅ 5/54017.182.28598.93
test_gemm[M_64-K_512-N_256-num_aie_columns_4-b_col_maj_True-c_col_maj_False-m_16-k_64-n_64-trace_size_0-partition_N_4]✅ 5/55779.180.2312.38
iron/operators/gemv
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_gemv[M_128-K_128-num_aie_columns_1-tile_size_input_32-tile_size_output_128]✅ 5/5n/a0.090.09
test_gemv[M_2048-K_8192-num_aie_columns_1-tile_size_input_1-tile_size_output_2048]✅ 5/5n/a3.653.64
test_gemv[M_2048-K_8192-num_aie_columns_2-tile_size_input_1-tile_size_output_1024]✅ 5/5n/a6.726.72
test_gemv[M_2048-K_8192-num_aie_columns_4-tile_size_input_1-tile_size_output_512]✅ 5/5n/a10.4710.47
test_gemv[M_8192-K_2048-num_aie_columns_1-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a3.693.69
test_gemv[M_8192-K_2048-num_aie_columns_2-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a6.536.52
test_gemv[M_8192-K_2048-num_aie_columns_4-tile_size_input_4-tile_size_output_1024]✅ 5/5n/a9.899.88
test_gemv_batched[M_1024-K_1024-num_aie_columns_1-tile_size_input_1-tile_size_output_64-num_batches_2]✅ 5/5n/a2.252.24
test_gemv_batched[M_1026-K_64-num_aie_columns_1-tile_size_input_1-tile_size_output_2-num_batches_2]✅ 5/5n/a0.400.39
test_gemv_batched[M_256-K_128-num_aie_columns_1-tile_size_input_1-tile_size_output_256-num_batches_4]✅ 5/5n/a0.520.51
test_gemv_batched[M_64-K_1536-num_aie_columns_1-tile_size_input_1-tile_size_output_64-num_batches_8]✅ 5/5n/a1.010.99
test_gemv_gelu[M_128-K_128-num_aie_columns_1-tile_size_input_32-tile_size_output_128]❌ 0/5n/an/an/a
test_gemv_gelu[M_2048-K_8192-num_aie_columns_1-tile_size_input_1-tile_size_output_2048]❌ 0/5n/an/an/a
test_gemv_gelu[M_8192-K_2048-num_aie_columns_1-tile_size_input_4-tile_size_output_1024]❌ 0/5n/an/an/a
iron/operators/layer_norm
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_layer_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5422.660.02n/a
test_layer_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5724.320.02n/a
test_layer_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5329.800.03n/a
test_layer_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5396.980.02n/a
test_layer_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5397.440.02n/a
test_layer_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5496.420.02n/a
iron/operators/leaky_relu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.01]✅ 5/5457.060.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.1]✅ 5/5390.880.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-alpha_0.25]✅ 5/5448.860.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-alpha_0.01]✅ 5/5386.380.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-alpha_0.01]✅ 5/5473.680.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-alpha_0.01]✅ 5/5434.720.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-alpha_0.01]✅ 5/5397.460.02n/a
test_leaky_relu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-alpha_0.01]✅ 5/5445.680.02n/a
iron/operators/mem_copy
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_mem_copy[input_length_2048-num_cores_1-num_channels_1-bypass_False-tile_size_2048]✅ 5/5371.740.02n/a
test_mem_copy[input_length_2048-num_cores_2-num_channels_1-bypass_False-tile_size_1024]✅ 5/5349.960.03n/a
test_mem_copy[input_length_2048-num_cores_2-num_channels_2-bypass_False-tile_size_1024]✅ 5/5390.000.02n/a
test_mem_copy[input_length_2048-num_cores_4-num_channels_1-bypass_False-tile_size_512]✅ 5/5481.580.02n/a
test_mem_copy[input_length_2048-num_cores_4-num_channels_2-bypass_False-tile_size_512]✅ 5/5354.300.02n/a
test_mem_copy[input_length_2048-num_cores_8-num_channels_2-bypass_False-tile_size_256]✅ 5/5401.520.02n/a
iron/operators/relu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_relu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5373.780.02n/a
test_relu[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5402.340.02n/a
test_relu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5395.440.02n/a
test_relu[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5467.120.02n/a
test_relu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5447.500.02n/a
test_relu[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5565.640.02n/a
iron/operators/repeat
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_cols_without_a_legal_split_is_rejected[cols_1031-why_prime > 1023: the only divisors are 1 and cols, neither legal]✅ 5/5n/an/an/a
test_cols_without_a_legal_split_is_rejected[cols_2062-why_2 x 1031: the only word-aligned chunk leaves a 1031-wide chunk count]✅ 5/5n/an/an/a
test_cols_without_a_legal_split_is_rejected[cols_513-why_odd: every divisor is odd, so no chunk is a whole 32-bit word]✅ 5/5n/an/an/a
test_repeat[rows_4-cols_1024-repeat_2-transfer_size_None]✅ 5/5341.200.08n/a
test_repeat[rows_8-cols_512-repeat_4-transfer_size_64]✅ 5/5644.640.11n/a
test_repeat[rows_8-cols_64-repeat_4-transfer_size_None]✅ 5/5338.520.02n/a
iron/operators/rms_norm
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-weighted_False]✅ 5/5311.620.03n/a
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048-weighted_True]✅ 5/5653.960.03n/a
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-weighted_False]✅ 5/5394.120.02n/a
test_rms_norm[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024-weighted_True]✅ 5/5392.240.03n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-weighted_False]✅ 5/5318.800.03n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024-weighted_True]✅ 5/5655.800.03n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-weighted_False]✅ 5/5397.460.02n/a
test_rms_norm[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512-weighted_True]✅ 5/5425.760.02n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-weighted_False]✅ 5/5411.880.02n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512-weighted_True]✅ 5/5446.280.02n/a
test_rms_norm[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256-weighted_False]✅ 5/5375.880.02n/a
iron/operators/rope
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_1-method_type_0]✅ 5/5550.440.20n/a
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_2-method_type_0]✅ 5/5368.760.29n/a
test_rope[rows_32-cols_512-angle_rows_32-aie_columns_4-method_type_0]✅ 5/5443.860.23n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_1-method_type_0]✅ 5/5411.960.19n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_2-method_type_0]✅ 5/5329.860.23n/a
test_rope[rows_32-cols_512-angle_rows_8-aie_columns_4-method_type_0]✅ 5/5419.520.19n/a
iron/operators/sigmoid
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_sigmoid[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5685.700.02n/a
test_sigmoid[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5352.740.03n/a
test_sigmoid[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5516.880.02n/a
test_sigmoid[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5894.400.01n/a
test_sigmoid[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5558.060.02n/a
test_sigmoid[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5496.900.02n/a
iron/operators/silu
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_silu[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5613.100.02n/a
test_silu[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5522.880.02n/a
test_silu[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5488.620.02n/a
iron/operators/softmax
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_1024]✅ 5/5451.820.33n/a
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_2048]✅ 5/5490.080.30n/a
test_softmax[input_length_32768-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5502.240.27n/a
iron/operators/strided_copy
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_strided_copy[chunked_transfer]✅ 5/5315.420.01n/a
test_strided_copy[contiguous]✅ 5/5324.120.01n/a
test_strided_copy[four_channels]✅ 5/5351.100.01n/a
test_strided_copy[kv_slot0]✅ 5/5297.800.45n/a
test_strided_copy[kv_slot5]✅ 5/5321.280.46n/a
test_strided_copy[kv_slot5_four_channels]✅ 5/5388.760.36n/a
test_strided_copy[kv_slot5_two_channels]✅ 5/5379.140.42n/a
test_strided_copy[kv_slot_last]✅ 5/5356.620.40n/a
test_strided_copy[two_channels]✅ 5/5322.900.01n/a
test_strided_copy[two_channels_chunked]✅ 5/5306.480.01n/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter0]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter1]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter2]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter3]✅ 1/1n/an/an/a
test_transfer_size_not_dividing_per_channel_share_is_rejected[iter4]✅ 1/1n/an/an/a
iron/operators/swiglu_decode
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_swiglu_decode[embedding_dim_1024-hidden_dim_3584]✅ 5/59622.170.00n/a
test_swiglu_decode[embedding_dim_2048-hidden_dim_2048]✅ 5/513314.940.00n/a
iron/operators/swiglu_prefill
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_swiglu_prefill[seq_len_256-embedding_dim_2048-hidden_dim_2048-prio_accuracy_False]✅ 5/516955.660.13n/a
iron/operators/tanh
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_tanh[input_length_2048-num_aie_columns_1-num_channels_1-tile_size_2048]✅ 5/5445.600.02n/a
test_tanh[input_length_2048-num_aie_columns_1-num_channels_2-tile_size_1024]✅ 5/5369.720.02n/a
test_tanh[input_length_2048-num_aie_columns_2-num_channels_1-tile_size_1024]✅ 5/5376.200.02n/a
test_tanh[input_length_2048-num_aie_columns_2-num_channels_2-tile_size_512]✅ 5/5905.140.01n/a
test_tanh[input_length_2048-num_aie_columns_4-num_channels_1-tile_size_512]✅ 5/5689.340.02n/a
test_tanh[input_length_2048-num_aie_columns_4-num_channels_2-tile_size_256]✅ 5/5484.880.02n/a
iron/operators/transpose
TestChecksLatency (mean)Bandwidth (mean)Throughput (mean)
test_transpose[M_2048-N_64-aie_columns_1-channels_1-m_64-n_64-s_8-num_batches_1]✅ 5/5622.940.94n/a
test_transpose[M_2048-N_64-aie_columns_1-channels_1-m_64-n_64-s_8-num_batches_2]✅ 5/5901.521.56n/a
test_transpose[M_2048-N_64-aie_columns_1-channels_2-m_64-n_64-s_8-num_batches_1]✅ 5/5585.160.95n/a
Phoenix - Examples

IRON

Tested on 2026_09_11_21_45_51 at commit 8fd5fe0.

Trend tables omitted, the comment hit GitHub's size limit. Full report in the workflow run.

@andrej
andrej added this pull request to the merge queue Sep 11, 2026
Merged via the queue into amd:devel with commit b2eb090 Sep 11, 2026
5 checks passed
@atassis
atassis deleted the fix/gemm-tile-divisibility-check branch September 12, 2026 00:56
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants