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Land the allocator and AIE codegen changes IRON's stream-dse operators need - #137
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…er leading batch index
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Stream AIE Metrics Regression Guard⚠ 15 cell(s) flagged (total_latency > 0.1% tol): hardware_swiglu[eyeriss_like_dual_core], hardware_swiglu[eyeriss_like_quad_core], hardware_swiglu[eyeriss_like_single_core], hardware_swiglu[fusemax], hardware_swiglu[meta_prototype], hardware_swiglu[simba], hardware_swiglu[simba_small], hardware_swiglu[tpu_like_quad_core], hardware_two_conv[eyeriss_like_dual_core], hardware_two_conv[eyeriss_like_quad_core], hardware_two_conv[fusemax], hardware_two_conv[meta_prototype], hardware_two_conv[simba], hardware_two_conv[simba_small], hardware_two_conv[tpu_like_quad_core] 16 of 16 cells captured Provenance: baseline hardware_swiglu — 8 hardware (⚠ 8 flagged)
hardware_two_conv — 8 hardware (⚠ 7 flagged)
To regenerate baseline: |
What IRON's stream-dse operators (amd/IRON#227) need from stream, on top of main.
SolverModel.value, and optional constraint families selected per solve throughSolveOptions.families, validated when the options are resolved.memory_portsfamily. Withintervalandburstoff it only reports, which is how IRON runs it: per-port, shared-bandwidth and link activity in the performance view.matmul_PVpassed the key length mlir-aie 1.4.4.dev73's kernel readsThe fast suite passes. With IRON's branch on mlir-aie 1.4.4.dev73, every MHA and SwiGLU stream-dse operator test passes on an NPU2 (85 tests, extensive included).