[Buffers] fix non-CFDFC paths having non-zero occupancy

[ziadomalik]

Problem: The implementation of the FPGA24 MILP's were missing constraint (10) and (11) described in this paper, resulting in patterns that are not in CFC's have a non-zero occupancy, which makes no sense, because occupancy tries to cater for incoming tokens in a loop body. (Initiation Interval).

This PR: Adds the missing constraints and re-works the rest of the code to adapt, as well as explicitly ignore patterns in the occupancy LP that have forks that are not part of a CFC.

[Jiahui17]

Where is II in the original constraint?

[Jiahui17]

@ziadomalik

Another thing that came across: could you generate a ONE_SLOT_BREAK_DV instead of a counter buffer if lat == 1 and slots == 1?

[Jiahui17]

Not related to the PR but we should remember to check if it helps

[ziadomalik]

Hi, turns out I thought adding the filtering was going to be enough so I kept the style where I formulated the constraint for all channels in a CFDFC. This is bad, since we emit one global equality per path pair, instead of one per CFDFC and a path shared by two CFDFCs with different IIs needs a separate constraint under each II, and the code was disregarding that. Also good catch on missing the II division, I think it was indirectly caused by the above. Now that we do per-CFDFC we can use the entries in computedCFDFCIIs that we already computed, the way we did it before wouldn't have made it possible. Like what II would I even pick. I think this should be fine now, no major improvements in terms of FF and LUT's.

Also tried the setting of ONE_SLOT_BREAK_DV for the case you mentioned above, nothing has changed, I will keep investigating though...