Compose a short melody on a VGA staff and play it back on a DE1-SoC FPGA.
A two-person Verilog project built for ECE241 at the University of Toronto in Fall 2025. The editor combines keyboard-driven note selection and pitch editing with hardware-generated audio playback.
This repository is a public portfolio showcase containing original explanations and recordings. Project source code, course documents, supplied libraries, and FPGA build artifacts remain private.
The three short recordings showcase the project playing a verse of Jingle Bells. Open a clip below; if GitHub offers a download instead of playback, use View raw to open the MP4.
| Recording | Length |
|---|---|
| Clip 1 | 16 seconds |
| Clip 2 | 15 seconds |
| Clip 3 | 10 seconds |
| Area | Capabilities |
|---|---|
| Score editing | Select a note position, change its pitch, and toggle notes or rests |
| VGA interface | Staff background and note sprites, with pitch mapped to vertical position |
| Keyboard input | PS/2 input for interacting with the editor |
| Playback | Sequential melody playback using timed note events and generated square-wave tones |
| Board feedback | Seven-segment displays report the selected note position and pitch |
The archived design organizes 24 score positions into three rows of eight, with 13 natural-note pitch choices from C4 through A5. It uses fixed beat timing rather than a general-purpose notation or audio workstation.
Architecture and design tradeoffs explains how input, score state, graphics, and audio fit together, with hardware and playback diagrams.
Built collaboratively by Peng Yang (Jonathan) Deng and Emma Le.
Verilog · DE1-SoC / Intel Cyclone V FPGA · Quartus · ModelSim · VGA · PS/2 · audio codec interface · memory initialization files
The completed project is demonstrated in the recordings. This overview draws on archived development snapshots; this repository does not include a buildable FPGA application.