A single AIE compute tile performs a simple reduction: it sums an N-element int32 input vector into a 1-element int32 output. Input data is brought to the local memory of the Compute tile via a Shim tile (default N = 1024), the reduction is performed in one kernel invocation, and the single output value is copied back to the Shim tile.
The design body is a single aie.iron.algorithms.reduce(reduce_add_vector, in_ty, out_ty) call; the algorithms library handles the ObjectFifo / Worker / Runtime plumbing for the reduce shape (whole-input single-kernel-call).
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vector_reduce_add.py: An@iron.jit-decorated design that delegates its dataflow body toaie.iron.algorithms.reduce. Supports standalone (python3 vector_reduce_add.py) and compile-only (--xclbin-path/--insts-path, used by theMakefile) modes. -
reduce_add.cc: A C++ implementation of a vectorizedaddreduction for AIE cores. The kernel uses the AIE API, documented here. Source: here. -
test.cpp: C++ testbench. Loads the compiled XCLBIN, supplies input, runs on the NPU, and verifies the result.
python3 vector_reduce_add.py-d npu2 for Strix; -n to override the input length.
make
make runFor NPU2 (Strix): make devicename=npu2 && make run devicename=npu2.