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cpufeatures: add support for avx10.1 and avx10.2
1 parent 98d49ed commit 64f4ae8

4 files changed

Lines changed: 195 additions & 1 deletion

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‎cpufeatures/README.md‎

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@@ -101,6 +101,8 @@ Target features:
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- `adx`
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- `aes`
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- `avx`
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- `avx10.1`*
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- `avx10.2`*
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- `avx2`
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- `avx512bw`*
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- `avx512cd`*

‎cpufeatures/src/lib.rs‎

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@@ -34,6 +34,7 @@ compile_error!("This crate works only on `aarch64`, `loongarch64`, `x86`, and `x
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#[macro_export]
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macro_rules! new {
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($mod_name:ident, $($tf:tt),+ $(,)?) => {
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#[allow(unexpected_cfgs)]
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mod $mod_name {
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use core::sync::atomic::{AtomicU8, Ordering::Relaxed};
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‎cpufeatures/src/x86.rs‎

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@@ -47,7 +47,13 @@ macro_rules! __detect_target_features {
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}
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let cr = unsafe {
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[cpuid(1), cpuid_count(7, 0), cpuid_count(7, 1)]
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[
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cpuid(1),
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cpuid_count(7, 0),
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cpuid_count(7, 1),
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cpuid(0),
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cpuid_count(0x24, 0),
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]
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};
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$($crate::check!(cr, $tf) & )+ true
@@ -81,6 +87,23 @@ macro_rules! __expand_check_macro {
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#[macro_export]
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#[doc(hidden)]
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macro_rules! check {
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($cr:expr, "avx10.1") => {{
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$crate::__xgetbv!($cr, 0b1110_0110)
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& ($cr[3].eax >= 0x24)
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& ($cr[2].edx & (1 << 19) != 0)
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& (($cr[4].ebx & 0xff) >= 1)
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& (($cr[4].ebx & (1 << 18)) != 0)
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}};
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($cr:expr, "avx10.2") => {{
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$crate::__xgetbv!($cr, 0b1110_0110)
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& ($cr[3].eax >= 0x24)
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& ($cr[2].edx & (1 << 19) != 0)
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& (($cr[4].ebx & 0xff) >= 2)
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& (($cr[4].ebx & (1 << 18)) != 0)
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& ($cr[2].eax & (1 << 4) != 0)
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& ($cr[2].edx & (1 << 4) != 0)
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& ($cr[2].edx & (1 << 10) != 0)
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}};
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$(
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($cr:expr, $name) => {{
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// Register bits are listed here:

‎cpufeatures/tests/x86.rs‎

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@@ -3,6 +3,7 @@
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#![cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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cpufeatures::new!(cpuid, "aes", "sha");
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cpufeatures::new!(cpuid_avx10, "avx10.1", "avx10.2");
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#[test]
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fn init() {
@@ -15,3 +16,170 @@ fn init_get() {
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let (token, val) = cpuid::init_get();
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assert_eq!(val, token.get());
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}
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#[test]
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fn avx10_probe_does_not_fault() {
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let (token, val) = cpuid_avx10::init_get();
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assert_eq!(val, token.get());
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let _ = cpuid_avx10::get();
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}
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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mod avx10_logic {
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#[cfg(target_arch = "x86")]
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use core::arch::x86::CpuidResult;
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#[cfg(target_arch = "x86_64")]
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use core::arch::x86_64::CpuidResult;
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fn leaf1() -> CpuidResult {
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CpuidResult {
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eax: 0,
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ebx: 0,
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ecx: 0b11 << 26,
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edx: 0,
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}
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}
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fn blank() -> CpuidResult {
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CpuidResult {
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eax: 0,
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ebx: 0,
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ecx: 0,
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edx: 0,
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}
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}
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#[test]
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fn version_zero_is_disabled() {
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let cr = [
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leaf1(),
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blank(),
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CpuidResult {
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eax: 0,
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ebx: 0,
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ecx: 0,
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edx: 1 << 19,
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},
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CpuidResult {
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eax: 0x24,
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ebx: 0,
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ecx: 0,
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edx: 0,
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},
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CpuidResult {
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eax: 0,
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ebx: (1 << 17) | (1 << 18),
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ecx: 0,
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edx: 0,
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},
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];
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assert!(!cpufeatures::check!(cr, "avx10.1"));
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assert!(!cpufeatures::check!(cr, "avx10.2"));
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}
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#[test]
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fn max_leaf_guard_holds() {
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let cr = [
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leaf1(),
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blank(),
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CpuidResult {
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eax: 0,
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ebx: 0,
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ecx: 0,
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edx: 1 << 19,
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},
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CpuidResult {
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eax: 0x16,
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ebx: 0,
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ecx: 0,
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edx: 0,
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},
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CpuidResult {
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eax: 0,
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ebx: 1 | (1 << 17) | (1 << 18),
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ecx: 0,
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edx: 0,
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},
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];
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assert!(!cpufeatures::check!(cr, "avx10.1"));
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assert!(!cpufeatures::check!(cr, "avx10.2"));
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}
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#[test]
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fn presence_bit_required() {
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let cr = [
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leaf1(),
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blank(),
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blank(),
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CpuidResult {
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eax: 0x24,
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ebx: 0,
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ecx: 0,
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edx: 0,
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},
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CpuidResult {
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eax: 0,
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ebx: 1 | (1 << 17) | (1 << 18),
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ecx: 0,
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edx: 0,
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},
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];
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assert!(!cpufeatures::check!(cr, "avx10.1"));
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assert!(!cpufeatures::check!(cr, "avx10.2"));
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}
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#[test]
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fn narrow_vector_without_512_bit_reports_false() {
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let cr = [
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leaf1(),
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blank(),
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CpuidResult {
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eax: 0,
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ebx: 0,
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ecx: 0,
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edx: 1 << 19,
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},
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CpuidResult {
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eax: 0x24,
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ebx: 0,
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ecx: 0,
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edx: 0,
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},
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CpuidResult {
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eax: 0,
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ebx: 1 | (1 << 17),
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ecx: 0,
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edx: 0,
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},
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];
155+
assert!(!cpufeatures::check!(cr, "avx10.1"));
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assert!(!cpufeatures::check!(cr, "avx10.2"));
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}
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#[test]
160+
fn vnni_trio_required_for_avx10_2() {
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let cr = [
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leaf1(),
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blank(),
164+
CpuidResult {
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eax: 0,
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ebx: 0,
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ecx: 0,
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edx: 1 << 19,
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},
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CpuidResult {
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eax: 0x24,
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ebx: 0,
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ecx: 0,
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edx: 0,
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},
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CpuidResult {
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eax: 0,
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ebx: 2 | (1 << 18),
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ecx: 0,
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edx: 0,
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},
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];
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assert!(!cpufeatures::check!(cr, "avx10.2"));
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}
185+
}

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